Single Event Upset Behavior of CMOS Static RAM Cells
Magazine article, 1993
An improved state-space analysis of the CMOS static RAM cell is presented. Introducing the concept of the dividing line, the critical charge for heavy-ion-induced upset of memory cells can be calculated considering symmetrical as well as asymmetrical capacitive loads. From the critical charge, the upset-rate per bit-day for static RAMs can be estimated.