Risat Pathan
Visar 34 publikationer
Bounding the execution time of parallel applications on unrelated multiprocessors
Federated Scheduling of Sporadic DAGs on Unrelated Multiprocessors
Design and analysis for dual priority scheduling
Scheduling parallel real-time recurrent tasks on multicore platforms
Improving the Quality-of-Service for scheduling Mixed-Criticality systems on multiprocessors
Timing-anomaly free dynamic scheduling of task-based parallel applications
Real-Time Scheduling Algorithm for Safety-Critical Systems on Faulty Multicore Environments
Timing-anomaly free dynamic scheduling of task-based parallel applications
Design of an efficient ready queue for earliest-deadline-first (EDF) scheduler
Real-Time Scheduling on Uni- and Multiprocessors based on Priority Promotions
Dual-Priority Scheduling: Current Result, Observation and Open Problem
On probabilistic analysis of disagreement in synchronous consensus protocols
Temporal Partitioning on Multicore Platform
Overhead-Aware Temporal Partitioning on Multicore Processors
Interference-aware fixed-priority schedulability analysis on multiprocessors
Fault-Tolerant and Real-Time Scheduling for Mixed-Criticality Systems
On reliability analysis of leader election protocols for virtual traffic lights
Reliability Analysis of Consensus in Cooperative Transport Systems (invited paper)
Schedulability Analysis of Mixed-Criticality Systems on Multiprocessors
A New Fixed-Priority Assignment Algorithm for Global Multiprocessor Scheduling
Three Aspects of Real-Time Multiprocessor Scheduling: Timeliness, Fault Tolerance, Mixed Criticality
Improved Schedulability Tests for Global Fixed-Priority Scheduling
FTGS: Fault-Tolerant Fixed-Priority Scheduling on Multiprocessors
Exact Fault-Tolerant Feasibility Analysis of Fixed-Priority Real-Time Tasks
Unambiguous Semantics In Automotive Timing Modeling
Load Regulating Algorithm for Static-Priority Task Scheduling on Multiprocessors
Parameterized Schedulability Analysis on Uniform Multiprocessors
Fault-Tolerant Real-Time Scheduling using Chip Multiprocessors
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