Control of Static Series Compensator for Mitigation of Power Quality Problems
Doktorsavhandling, 2004

Power Electronics and Advanced Control technologies have made it possible to mitigate the power quality problems and maintain the operation of sensitive loads. Among power system disturbances, voltage dips, swells, and harmonics are some of the severe problems to the critical industrial loads. The static series compensator (SSC) is best suited to protect such loads against those disturbances. This thesis focuses on the control of the SSC in order to improve the transient and the steady-state responses and increase its injection capability. To mitigate voltage dips, the thesis proposes a vector-controlled based algorithm to improve the transient and the steady-state responses of the SSC. The developed algorithm incorporates both current and voltage controllers with an inner current loop and outer voltage loop. Thus, it is referred to as the Double Vector Control (DVC) algorithm. To cope with the unbalanced dips, a fast technique to detect the positive and the negative sequences is employed. Then the two sequences are controlled separately. Also the influence of the switching frequency on the controller performance is studied. A Software Phase Locked Loop with a PI controller is proposed in order to obtain the phase and the frequency information of the grid voltage. The tuning of the PI controller is made according to a developed criterion based on the frequency requirements of the loads. A number of power system events are studied and the behavior of the SSC is tested against each event. These events include short-circuit faults, capacitor-bank energizing, transformer energizing and load switching (linear and non-linear loads). Recommendations regarding the SSC operation for each event are given. The possibility of employing the SSC to mitigate swells/overvoltages is investigated. An overvoltage protection scheme is proposed, based on a combination of a dc resistor with a chopper and the SSC. The design equations of the dc resistor together with the chopper are provided. In order to mitigate the voltage harmonics, a new controller is developed and implemented. In the proposed controller, a moving average filter is implemented in the synchronous reference frame to extract the fundamental component of the measured voltages and currents. Also, an active filtering capability is added by using the resonant filters for the 5th and the 7th harmonics. After the extraction of the fundamental component, it is controlled by the DVC. The operation of the SSC under distorted utility conditions and voltage dips is discussed. The thesis also proposes two control techniques to charge the energy storage capacitor of the SSC. One of the techniques is based on a shunt diode rectifier, which is placed either on the load side or the grid side (both configurations are studied). The other technique exploits the voltage source converter of the SSC in combination with a proper control algorithm to charge the capacitor. A design guide for the energy storage capacitor is given. To minimize the required active power, this thesis discusses and compares four different compensation strategies: 1) Voltage Difference Compensation; 2) In-Phase Compensation; 3) Phase Advance Compensation; 4) Progressive Phase Advance Compensation. The effect of the load power factor on the different strategies is investigated. A control algorithm based on a combination of the four strategies is proposed taking into account the minimization of the active power and keeping the injected voltage within the ratings of the SSC. The validity of the developed controllers is verified by simulations and experiments. The simulation models are developed and implemented in the PSCAD/EMTDC package. A 10-kV SCC prototype is exploited to carry out the experiments with various load types.

10.00 Hörsalsvägen 11
Opponent: Prof Johann Walter Kolar, ETH Zurich, Switzerland


Hilmy Awad

Chalmers, Energi och miljö, Elkraftteknik


Annan elektroteknik och elektronik



Technical report - School of Electrical Engineering, Chalmers University of Technology, Göteborg, Sweden: 475

Doktorsavhandlingar vid Chalmers tekniska högskola. Ny serie: 2088

10.00 Hörsalsvägen 11

Opponent: Prof Johann Walter Kolar, ETH Zurich, Switzerland