The Impact of the Skin Effect on Deep Submicron Integrated Circuits
Since the first chip was manufactured in a CMOS technology there has been a drive to shrink dimensions of both wires and transistors. The reason is that down-scaling enables designs with more functionality and higher performance. However, with the 0.25um process, interconnects became as important as the gate delay. Today interconnects are the limiting factor for chip performance. This requires that more attention has to be paid to the behavior of interconnects.
Until the recent years, RC models have been used to capture interconnect behavior. However, today when designing high performance circuits, RC models are not accurate since inductance (L) is becoming significant. In some cases not even RLC models are accurate enough to capture interconnect behavior because of secondary effects that affect interconnects. One of these secondary effects is the skin effect. The skin effect is a phenomenon where high frequency current tend to crowd at the surface of the interconnect, due to the inductive effects. This results in a frequency-dependent resistance that increases with frequency.
In this thesis the impact of the skin effect to the interconnect delay is investigated. For a scenario where interconnect length and width are varied along with the driver strength, the skin effect is shown to give a substantial excess delay to the interconnect delay. This excess delay is also shown to have a large impact on buffer design, thus a repeater insertion method that takes the skin effect into account is presented.