Single Phase Active Power Factor Correction Converters - Methods for Optimizing EMI, Performance and Costs
In this thesis, front-end solutions with single-phase power factor correction (PFC) capability are studied. The reduction of current harmonics using various PFC techniques is investigated and related to the EN 61000-3-2 standard. Moreover, power electronics issues concerning diode recovery characteristics, boost inductor design and MOSFET switching speed considerations for optimizing the overall EMI and efficiency performance of continuous mode active PFC Converters are studied. In addition, the design and construction of a 1200 W continuous conduction mode (CCM) PFC circuit prototype, used for making various measurements, is presented and discussed.
With the main objective of this dissertation being optimizing performance and cost indices of continuous mode PFC converters, the results of this research work are presented in three main parts.
Firstly issues related to generation of harmonic currents by AC-DC single-phase rectifier-capacitor filter circuits when connected to the utility network, the legal obligations set forth by the European standard EN 61000-3-2 for limiting generation of low-frequency harmonics and different PFC techniques and strategies useful for meeting this standard, are studied. A novel approach of having a central PFC circuit for domestic and commercial loads leading to lower current harmonic distortion without the need to install (expensive) active rectifiers in each end-user device is proposed.
Secondly, based on various measurement results, some new methods to optimize overall EMI and efficiency performance of continuous mode active PFC circuits are presented. These methods resulted in performance improvements by way of higher efficiency, cost reduction and reduction in radiated and conducted EMI by over 10 to 23 dB μV.
Lastly, all papers published in various journals and conferences from the above work, are presented.
Diode Recovery Time