Mixed-signal implementation of differential decoding using binary message passing algorithms
Paper i proceeding, 2015

© 2015 IEEE. This paper presents the mixed-signal circuit implementation of reduced complexity algorithms for decoding low-density parity check (LDPC) codes. Based on modified differential decoding using binary message passing (MDD-BMP), binary addition using discrete-time digital circuits is replaced by continuous-time analog-current summation. Potential degradation due to the mismatch between current sources, P/N strength mismatch and inverter-threshold mismatch is considered in behavioural simulation and shown to be tolerable. Area estimates suggest a reduction from 0.27 mm2 to 0.11 mm2 for the FG(273, 191) code. Finally, transistor level simulation of the FG(273, 191) code using TSMC 65 nm technology shows an efficiency of 0.56 pJ/bit.

LDPC

VLSI

energy efficient

analog circuits

iterative decoding

binary messages

Författare

G. Cowan

Université Concordia

Kevin Cushon

Chalmers, Mikroteknologi och nanovetenskap (MC2), Fotonik

W. Gross

McGill University

Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors

1063-6862 (ISSN)

Vol. 2015-September 116-119

Ämneskategorier

Elektroteknik och elektronik

DOI

10.1109/ASAP.2015.7245718

ISBN

978-147991924-6