One Bit is (Not) Enough: An Empirical Study of the Impact of Single and Multiple Bit-Flip Errors
Paper i proceeding, 2017

Recent studies have shown that technology and voltage scaling are expected to increase the likelihood that particle-induced soft errors manifest as multiple-bit errors. This raises concerns about the validity of using single bit-flips for assessing the impact of soft errors in fault injection experiments. The goal of this paper is to investigate whether multiple-bit errors could cause a higher percentage of silent data corruptions (SDCs) compared to single-bit errors. Based on 2700 fault injection campaigns with 15 benchmark programs, featuring a total of 27 million experiments, our results show that single-bit errors in most cases yields a higher percentage of SDCs compared to multiple-bit errors. However, in 8% of the campaigns we observed a higher percentage of SDCs for multiple-bit errors. For most of these campaigns, the highest percentage of SDCs was obtained by flipping at most 3 bits. Moreover, we propose three ways of pruning the error space based on the results.

error space pruning

single/multiple bit-flip errors

transient hardware faults

fault injection


Behrooz Sangchoolie

Chalmers, Data- och informationsteknik, Datorteknik

Karthik Pattabiraman

University of British Columbia (UBC)

Johan Karlsson

Chalmers, Data- och informationsteknik, Datorteknik

The 47th IEEE/IFIP International Conference on Dependable Systems and Networks

97-108 8023114
978-1-5386-0541-7 (ISBN)







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