An Empirical Study of the Impact of Single and Multiple Bit-Flip Errors in Programs
Artikel i vetenskaplig tidskrift, 2022

Recent studies have shown that technology and voltage scaling are expected to increase the likelihood that particle-induced soft errors manifest as multiple-bit errors. This raises concerns about the validity of using single bit-flips in fault injection experiments aiming to assess the program-level impact of soft errors. The goal of this paper is to investigate whether multiple-bit errors could cause a higher percentage of silent data corruptions (SDCs) compared to single-bit errors. Based on 2700 fault injection campaigns with 15 benchmark programs, featuring a total of 27 million experiments, our results show that single-bit errors in most cases either yield a higher percentage of SDCs compared to multiple-bit errors or yield SDC results that are very close to the ones obtained for the multiple-bit errors. Further, we find that only around 2% of the multiple-bit campaigns resulted in an SDC percentage that was more than 5 percentage points higher than that obtained for the corresponding single-bit campaigns. For most of these campaigns, the highest percentage of SDCs was obtained by flipping at most 3 bits. Based on our results, we also propose four techniques for error space pruning to avoid injection of multiple-bit errors that are either unlikely or infeasible to cause SDCs.

transient hardware faults

error space pruning

error space clustering

single/multiple bit-flip errors

Fault injection


Behrooz Sangchoolie

RISE Research Institutes of Sweden

Karthik Pattabiraman

University of British Columbia (UBC)

Johan Karlsson

Chalmers, Data- och informationsteknik, Datorteknik

IEEE Transactions on Dependable and Secure Computing

1545-5971 (ISSN) 19410018 (eISSN)

Vol. 19 3 1988-2006



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