A study of recent advances in cache memories
Paper i proceeding, 2014

Registers within a processor, cache within, on, or outside the processor, and virtual memory on the disk drive builds memory hierarchy in modern computer systems. The principle of locality of reference makes this memory hierarchy work efficiently. In recent years, cache organizations and designs have witnessed several advances that have not only improved their performance such as hit rates, speed, latency, energy consumption, etc. but various new designs and organizations for chip multi-processors such as multilevel caches, Non-Uniform Cache Access (NUCA), hybrid caches, etc. have also emerged. This paper presents a study of current competing processors in terms of various factors determining performance and throughput of cache organization and design. To evaluate their performance and viability, it reviews recent cache trends that include hybrid cache memory, non-uniform cache architecture, energy efficient replacement algorithms, cache memory programming, software defined caches and emerging techniques for making cache reliable against soft errors. It discusses the pros and cons of emerging cache architectures and designs.


Memory management


Algorithm design and analysis

Random access memory

Cache memory


M. Tariq Banday

University of Kashmir

Munis Khan

Shri Mata Vaishno Devi University

2014 International Conference on Contemporary Computing and Informatics (IC3I)

978-1-4799-6629-5 (ISBN)

2014 International Conference on Contemporary Computing and Informatics (IC3I)
Mysore, India,







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