Designing a Functional Programming Architecture for the Internet of Things
Licentiatavhandling, 2022
This thesis aims to address this by making it possible to run high-level functional programs on IoT devices, a daunting prospect with traditional hardware due to the overheads of functional programming runtimes. To accomplish this, an architecture and partial implementation of a "natively functional" processor for IoT, named Cephalopode, is presented. The processor performs both graph reduction and garbage collection directly, without requiring an expensive software runtime.
Implementing Cephalopode raised several opportunities for improving the process of hardware design. To that end, this thesis presents the finite state machine editor Stately and the high-level language Bifröst. Stately raises the level of abstraction of finite state machines enough to avoid a proliferation of edges during design, while maintaining efficiency and low-level control. Bifröst offers a higher-level approach to hardware design, allowing complex algorithmic processes—in particular those that communicate extensively with other components—to be described in an imperative language and compiled to an RTL-level circuit model.
High-Level Synthesis
internet of things
Hardware description languages
Architectures
Functional Programming
Författare
Jeremy Pope
Chalmers, Data- och informationsteknik, Funktionell programmering
Cephalopode: A custom processor aimed at functional language execution for IoT devices.
2020 18th ACM-IEEE International Conference on Formal Methods and Models for System Design, MEMOCODE 2020,;(2020)
Paper i proceeding
Stately: An FSM Design Tool.
2020 18th ACM-IEEE International Conference on Formal Methods and Models for System Design, MEMOCODE 2020,;(2020)
Paper i proceeding
Lesbre, D, Pope, J, Seger, C.-J. H. Designing an Arbitrary-Precision ALU for an IoT Processor.
Ämneskategorier
Datorteknik
Inbäddad systemteknik
Datorsystem
Styrkeområden
Informations- och kommunikationsteknik
Utgivare
Chalmers