Tunnel Emitter Transistors
Doktorsavhandling, 2003

The Tunnel Emitter Transistor is based on the modulation of the tunnel current in a Metal Oxide Semiconductor (MOS) structure with an ultra-thin oxide layer. The modulation is accomplished by injecting charge to the oxide-semiconductor interface from a third terminal. Its physical structure closely resembles a p-type Metal-Oxide-Semiconductor Field-Effect Transistor (pMOSFET) with a very thin gate dielectric, a contacted substrate and the source and drain wired together; hence it is as easy to fabricate as conventional MOSFETs. TETs work in the same temperature range as normal transistors. This thesis reports on the fabrication and characterisation of Al / SiO2 / Si TETs with a significantly higher small-signal and large-signal gain than previous work. These devices have been used mainly as a basis for constructing different device models, also presented in this thesis, from which DC and HF behaviour of devices with different designs have have been predicted. TET measurements have also been performed on pMOSFETs, showing that TETs are inherent in devices made with modern CMOS processes. There is currently no application where TETs are used, but the results in this thesis point out a new direction for TET research towards possible niche applications. That direction is a change of materials in the device. Most importantly, the dielectric should be changed to Ta2O5 or some other dielectric with similar electrical properties.

TET

tunneling

siO<sub>2</sub>

tunnel emitter transistor

MOS

Ta<sub>2</sub>O<sub>5</sub>

silicon

high-&#954

BICFET

dielectrics

Författare

Erik Aderstedt

Chalmers, Mikroteknologi och nanovetenskap (MC2)

Ämneskategorier

Fysik

Elektroteknik och elektronik

ISBN

91-7291-390-8

Doktorsavhandlingar vid Chalmers tekniska högskola. Ny serie: 2072

Technical report - School of Electrical Engineering, Chalmers University of Technology, Göteborg, Sweden: 471