Daniel Andersson
Showing 14 publications
Extracting Vectors from Application Traces for Power Integrity Analysis
On-chip Power Supply Noise and Its Implications on Timing
Supply Voltage Drop Study Considering On-Chip Self Inductance of a 32-bit Processor's Power Grid
Towards Supply-Grid-Based Derating of Timing Margins
Noise-Aware On-Chip Power Grid Considerations Using a Statistical Approach
Noise Interaction Between Power Distribution Grids and Substrate
Time-Domain Interconnect Characterisation Flow for Appropriate Model Segmentation
Toward a Systematic Sensitivity Analysis of On-Chip Power Grids Using Factor Analysis
Interconnect Characterization Flow for Minimal-Segment Model Selection
Accounting for the Skin Effect during Repeater Insertion
The Impact of the Skin Effect on Deep Submicron Integrated Circuits
Frequency-Dependent Effects in RLC Interconnects
On Skin Effect in On-Chip Interconnects
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