Showing 14 publications
Extracting Vectors from Application Traces for Power Integrity Analysis
On-chip Power Supply Noise and Its Implications on Timing
Towards Supply-Grid-Based Derating of Timing Margins
Supply Voltage Drop Study Considering On-Chip Self Inductance of a 32-bit Processor's Power Grid
Noise-Aware On-Chip Power Grid Considerations Using a Statistical Approach
Time-Domain Interconnect Characterisation Flow for Appropriate Model Segmentation
Interconnect Delay and Integrity Issues in On-Chip Circuits
Noise Interaction Between Power Distribution Grids and Substrate
Toward a Systematic Sensitivity Analysis of On-Chip Power Grids Using Factor Analysis
Interconnect Characterization Flow for Minimal-Segment Model Selection
Accounting for the Skin Effect during Repeater Insertion
The Impact of the Skin Effect on Deep Submicron Integrated Circuits
On Skin Effect in On-Chip Interconnects
Frequency-Dependent Effects in RLC Interconnects
Download publication list
You can download this list to your computer.
Filter and download publication list
As logged in user (Chalmers employee) you find more export functions in MyResearch.
You may also import these directly to Zotero or Mendeley by using a browser plugin. These are found herer:
Mendeley Web Importer
The service SwePub offers export of contents from Research in other formats, such as Harvard and Oxford in .RIS, BibTex and RefWorks format.