Daniel Andersson

Showing 14 publications

2011

Extracting Vectors from Application Traces for Power Integrity Analysis

Martin Olsson, Johnny Pihl, Daniel Andersson et al
Proceedings of IEEE Workshop on Signal Propagation on Interconnects (SPI). Naples, 8-11 May 2011, p. 39-42
Paper in proceedings
2010

On-chip Power Supply Noise and Its Implications on Timing

Lars Svensson, Johnny Pihl, Daniel Andersson et al
Proceedings of ACM Great Lakes Symposium on VLSI (GLSVLSI), p. 389-392
Paper in proceedings
2009

Towards Supply-Grid-Based Derating of Timing Margins

Lars Svensson, Johnny Pihl, Daniel Andersson et al
2009 IEEE Workshop on Signal Propagation on Interconnects, SPI '09; Strasbourg; France; 12 May 2009 through 15 May 2009
Paper in proceedings
2009

Supply Voltage Drop Study Considering On-Chip Self Inductance of a 32-bit Processor's Power Grid

Daniel Andersson, Björn Nilsson, Johnny Pihl et al
2009 IEEE Workshop on Signal Propagation on Interconnects, SPI '09; Strasbourg; France; 12 May 2009 through 15 May 2009
Paper in proceedings
2008

Noise-Aware On-Chip Power Grid Considerations Using a Statistical Approach

Daniel Andersson, Lars Svensson, Per Larsson-Edefors
Proceedings of Intl Symp. on Quality Electronic Design (ISQED), p. 663-669
Paper in proceedings
2008

Time-Domain Interconnect Characterisation Flow for Appropriate Model Segmentation

Daniel Andersson, Lars Svensson, Per Larsson-Edefors
IET Computers & Digital Techniques. Vol. 2 (4), p. 265-274
Journal article
2008

Interconnect Delay and Integrity Issues in On-Chip Circuits

Daniel Andersson
Doctoral thesis
2008

Noise Interaction Between Power Distribution Grids and Substrate

Daniel Andersson, Simon Kristiansson, Lars Svensson et al
Proceedings of Intl Symp. on Quality Electronic Design (ISQED), p. 84-90
Paper in proceedings
2007

Toward a Systematic Sensitivity Analysis of On-Chip Power Grids Using Factor Analysis

Daniel Andersson, Lars Svensson, Per Larsson-Edefors
IEEE Workshop on Signal Propagation on Interconnects
Paper in proceedings
2006

Interconnect Characterization Flow for Minimal-Segment Model Selection

Daniel Andersson, Lars Svensson, Per Larsson-Edefors
Norchip Conference
Paper in proceedings
2005

Accounting for the Skin Effect during Repeater Insertion

Daniel Andersson, Lars Svensson, Per Larsson-Edefors
2005 ACM Great Lakessymposium on VLSI, GLSVLSI'05; Chicago, IL; United States; 17 April 2005 through 19 April 2005, p. 32-37
Paper in proceedings
2004

On Skin Effect in On-Chip Interconnects

Daniel Andersson, Lars Svensson, Per Larsson-Edefors
Intl Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), p. 463-470
Paper in proceedings
2004

Frequency-Dependent Effects in RLC Interconnects

Daniel Andersson, Lars Svensson, Per Larsson-Edefors
Swedish System-on-Chip Conference
Conference contribution

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