Andreas Lööw

Showing 5 publications

2021

Building Verified Hardware and Verified Stacks in HOL

Andreas Lööw
Doctoral thesis
2021

Lutsig: A Verified Verilog Compiler for Verified Circuit Development

Andreas Lööw
Proceedings of the 10th ACM SIGPLAN International Conference on Certified Programs and Proofs, p. 46-60
Paper in proceeding
2019

A Proof-Producing Translator for Verilog Development in HOL

Andreas Lööw, Magnus Myreen
Proceedings - 2019 IEEE/ACM 7th International Workshop on Formal Methods in Software Engineering, FormaliSE 2019, p. 99-108
Paper in proceeding
2019

Building Verified Hardware and Verified Stacks in HOL

Andreas Lööw
Licentiate thesis
2019

Verified Compilation on a Verified Processor

Andreas Lööw, Ramana Kumar, Yong Kiam Tan et al
PROCEEDINGS OF THE 40TH ACM SIGPLAN CONFERENCE ON PROGRAMMING LANGUAGE DESIGN AND IMPLEMENTATION (PLDI '19), p. 1041-1053
Paper in proceeding

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