Amplification of microwave excitiations is the standard method for readout of quantum bits in a quantum processor around 50 mK. Today the first step in amplification is done using a superconducting parametric amplifier. In the proposed project, we want to explore the potential for using a semiconducting transistor amplifier for readout of qubits. This would offer much better amplification characteristics. Today, this is not possible because the transistor operate at too high power level and suffer from elevated noise temperature compared to the parametric amplifier. Fundamentally, if the dc power would be possible to reduce whereas transconductance still is elevated at low drain current, the transistor noise would improve also below 1 K. We therefore propose to re-design the lowest noise transistor, the InP HEMT, to operate at 100x lower power consumption than used today. The project involves the desing of a new epi structure, optimization of a an ultra-low-power 50-100 nm gate HEMT process, minimization of on-resistance using a new non-alloyed contact scheme, on-wafer device characterization and noise modeling at 4 K, transistor implementation in a C-band cryogenic low noise amplifier module and experiments in a millikelvin dilution refigerator for qubit readout. If successful, the project would offer new insights how the HEMT amplify signals at a fraction of the power used today. The finding would be important in the design of the readout chain in qubit processing.
Full Professor at Chalmers, Microtechnology and Nanoscience (MC2), Terahertz and Millimetre Wave Laboratory
Funding Chalmers participation during 2019–2022
Areas of Advance