Planar double-gate SOI MOS devices: Fabrication by wafer bonding over pre-patterned cavities and electrical characterization
Journal article, 2007

Author

T.M Chung

B Olbrechts

Ulf Södervall

Chalmers, Microtechnology and Nanoscience (MC2)

Stefan Bengtsson

Chalmers, Microtechnology and Nanoscience (MC2)

D Flandre

J. P. Raskin

Solid State Electronics

Vol. 51 2 231-238

Subject Categories

Other Electrical Engineering, Electronic Engineering, Information Engineering

More information

Created

10/6/2017