Transactional prefetching: Narrowing the window of contention in hardware transactional memory
Paper in proceeding, 2012
Prefetching
Hardware transactional memory
Multicores
Author
Anurag Negi
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
A. Armejach
Polytechnic University of Catalonia
Centro Nacional de Supercomputacion
A. Cristal
Centro Nacional de Supercomputacion
CSIC - Instituto de Investigacion en Inteligencia Artificial (IIIA)
O.S. Unsal
Centro Nacional de Supercomputacion
Per Stenström
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT
1089795X (ISSN)
181-190Subject Categories
Computer and Information Science
DOI
10.1145/2370816.2370844