Anurag Negi

Showing 22 publications

2014

ZEBRA: Data-Centric Contention Management in Hardware Transactional Memory

Ruben Titos Gil, Anurag Negi, M. E. Acacio et al
IEEE Transactions on Parallel and Distributed Systems. Vol. 25 (5), p. 1359-1369
Journal article
2014

Performance and energy analysis of the restricted transactional memory implementation on haswell

Bhavishya Goel, Ruben Titos Gil, Anurag Negi et al
Proceedings of the International Parallel and Distributed Processing Symposium, IPDPS, p. 615-624
Paper in proceedings
2013

Eager Beats Lazy: Improving Store Management in Eager Hardware Transactional Memory

Ruben Titos Gil, Anurag Negi, M. E. Acacio et al
IEEE Transactions on Parallel and Distributed Systems. Vol. 24 (11), p. 2192-2201
Journal article
2013

SCIN-Cache: Fast Speculative Versioning in Multithreaded Cores

Anurag Negi, Ruben Titos Gil
Transactions on Architecture and Code Optimization. Vol. 9 (4)
Journal article
2013

HARP: Adaptive Abort Recurrence Prediction for Hardware Transactional Memory

Adria Arjemash, Osman Unsal, Anurag Negi et al
20th Annual International Conference on High Performance Computing, HiPC 2013 (196-205)
Paper in proceedings
2013

Efficient Forwarding of Producer-Consumer Data in Task-based Programs

Madhavan Manivannan, Anurag Negi, Per Stenström
Report
2013

Efficient Forwarding of Producer-Consumer Data in Task-based Programs

Madhavan Manivannan, Anurag Negi, Per Stenström
Proceedings of the International Conference on Parallel Processing. 40th International Conference on Parallel Processing, ICPP 2013, Lyon, 1-4 October 2013, p. 517-522
Paper in proceedings
2013

Techniques to Improve Performance in Requester-Wins Hardware Transactional Memory

A. Armejach, Ruben Titos Gil, Anurag Negi et al
Transactions on Architecture and Code Optimization. Vol. 10 (4), p. articlenr, 42-
Journal article
2012

Transactional prefetching: Narrowing the window of contention in hardware transactional memory

Anurag Negi, A. Armejach, A. Cristal et al
Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT, p. 181-190
Paper in proceedings
2012

Transactional Prefetching: Narrowing the Window of Contention in Hardware Transactional Memory

Adria Arjemach, Anurag Negi, Adrian Cristal et al
TRANSACT
Conference contribution
2012

Transactional Prefetching: Narrowing the Window of Contention in Hardware Transaction Memory

Anurag Negi, Adria Armejach, Adrian Cristal et al
International Conference on Parallel Architectures and Compiler Techniques (PACT)
Paper in proceedings
2012

Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory

Anurag Negi, Ruben Titos Gil, M. E. Acacio et al
18th IEEE International Symposium on High Performance Computer Architecture (;New Orleans, LA; February 25-29 2012, p. 141-151
Paper in proceedings
2012

A Data Forwarding Scheme for Task-based Programming Models

Madhavan Manivannan, Anurag Negi, Per Stenström
Proceedings of the Fifth Swedish Workshop on Multicore Computing
Conference contribution
2011

ZEBRA: A data-centric, hybrid-policy hardware transactional memory design

R. Titos-Gil, Anurag Negi, M. E. Acacio et al
Proceedings of the International Conference on Supercomputing, ICS 2011. Tucson, 31 May-4 June 2011, p. 53-62
Paper in proceedings
2011

The Impact of Non-coherent on Lazy HardwareTransactional Memory Systems

Anurag Negi, Ruben Titos, M. E. Acacio et al
APDCM 2011 (in conj. with 2011 IEEE IPDPS)
Paper in proceedings
2011

The impact of non-coherent buffers on lazy hardware transactional memory systems

Anurag Negi, Ruben Titos Gil, M. E. Acacio et al
IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum, 25th IEEE International Parallel and Distributed Processing Symposium, Workshops and Phd Forum, IPDPSW 2011; Anchorage, AK; 16 May 2011 through 20 May 2011, p. 700-707
Paper in proceedings
2011

Adaptable Hardware Transactional Memory Protocols

Anurag Negi
Licentiate thesis
2011

Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory

Anurag Negi, Per Stenström, Ruben Titos Gil et al
Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT (Article number 6113816), p. 203-204
Paper in proceedings
2011

Eager meets lazy: The impact of write-buffering on hardware transactional memory

Anurag Negi, R. Titos-Gil, M. E. Acacio et al
Proceedings of the International Conference on Parallel Processing. 40th International Conference on Parallel Processing, ICPP 2011, Taipei City, 13-16 September 2011, p. 73-82
Paper in proceedings
2010

LV*: A Class of Lazy-Versioning HTMs for Low-Cost Integration of Transactional Memory Systems

Anurag Negi, Mridha Mohammad Waliullah, Per Stenström
2nd IEEE Int. Forum of Next-Generation Multicore/Many-Core Technologies (IFMT’2010)
Paper in proceedings
2010

LV*: A Low Complexity Lazy Versioning HTM Infrastructure

Anurag Negi, Mridha Mohammad Waliullah, Per Stenström
Proceedings - 2010 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2010, p. 231-240
Paper in proceedings

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