Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory
Paper in proceeding, 2012
Coherence protocol
Conflict detection
Conflict Resolution
Shared data
Concurrent transactions
Coarse-grained
Transactional memory
Author
Anurag Negi
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
Ruben Titos Gil
University of Murcia
M. E. Acacio
University of Murcia
J. M. García
University of Murcia
Per Stenström
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
Proceedings - International Symposium on High-Performance Computer Architecture
15300897 (ISSN)
141-151978-146730824-3 (ISBN)
Areas of Advance
Information and Communication Technology
Subject Categories
Computer and Information Science
DOI
10.1109/HPCA.2012.6168951
ISBN
978-146730824-3