Improving Data Access Efficiency by Using a Tagless Access Buffer (TAB)
Paper in proceeding, 2013

The need for energy efficiency continues to grow for many classes of processors, including those for which performance remains vital. Data cache is crucial for good performance, but it also represents a significant portion of the processor's energy expenditure. We describe the implementation and use of a tagless access buffer (TAB) that greatly improves data access energy efficiency while slightly improving performance. The compiler recognizes memory reference patterns within loops and allocates these references to a TAB. This combined hardware/software approach reduces energy usage by (1) replacing many level-one data cache (L1D) accesses with accesses to the smaller, more power-efficient TAB; (2) removing the need to perform tag checks or data translation lookaside buffer (DTLB) lookups for TAB accesses; and (3) reducing DTLB lookups when transferring data between the L1D and the TAB. Accesses to the TAB occur earlier in the pipeline, and data lines are prefetched from lower memory levels, which result in asmall performance improvement. In addition, we can avoid many unnecessary block transfers between other memory hierarchy levels by characterizing how data in the TAB are used. With a combined size equal to that of a conventional 32-entry register file, a four-entry TAB eliminates 40% of L1D accesses and 42% of DTLB accesses, on average. This configuration reduces data-access related energy by 35% while simultaneously decreasing execution time by 3%.

strided access

memory hierarchy

energy

Author

Alen Bardizbanyan

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Peter Gavin

Florida State University

David Whalley

Florida State University

Magnus Själander

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Per Larsson-Edefors

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Sally A McKee

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Per Stenström

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2013

269-279 6495003
978-1-4673-5525-4 (ISBN)

Areas of Advance

Information and Communication Technology

Driving Forces

Sustainable development

Subject Categories

Computer Systems

DOI

10.1109/CGO.2013.6495003

ISBN

978-1-4673-5525-4

More information

Created

10/7/2017