Alen Bardizbanyan
Showing 18 publications
CREEP: Chalmers RTL-based Energy Evaluation of Pipelines
Data filter cache designs for enhancing energy efficiency and performance in computing systems
Systems and methods for improving processor efficiency through caching
Practical Way Halting by Speculatively Accessing Halt Tags
Logic Filter Cache for Wide-VDD-Range Processors
Exploring early and late ALUs for single-issue in-order pipelines
Data Access Techniques for Enhanced Energy Efficiency and Performance in In-order Pipelines
Improving Data Access Efficiency by Using Context-Aware Loads and Stores
Reducing set-associative L1 data cache energy by early load data dependence detection (ELD3)
Evaluating Branch Predictor Configurations for a MIPS-like Pipeline
Improving Data Access Efficiency by Using a Tagless Access Buffer (TAB)
Towards a Performance- and Energy-Efficient Data Filter Cache
Designing a Practical Data Filter Cache to Improve Both Energy Efficiency and Performance
Speculative Tag Access for Reduced Energy Dissipation in Set-Associative L1 Data Caches
Techniques to Reduce Energy Dissipation in Level-1 Data Caches
Configurable RTL Model for Level-1 Caches
Reconfigurable Instruction Decoding for a Wide-Control-Word Processor
Generation and Exploration of Layouts for Area-Efficient Barrel Shifters
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