Wafer-scale graphene synthesis, transfer and FETs
Paper in proceeding, 2013

Growth and characterization of graphene grown using copper foils as well as copper films on silicon dioxide on silicon substrates were performed. Kinetics of growth and effective activation energy for the graphene synthesis will be discussed for the surface catalytic synthesis of graphene. Conditions for large-scale synthesis of monolayer graphene will be addressed in this talk. Wafer-scale graphene transfer and electrical results will be presented. Based on our preliminary results from capped 100mm wafer scale graphene transistors, we expect a mobility of 4-6 k cm2/Vs with symmetry hole/electron transport. Key considerations and challenges for scaling are discussed and results for graphene growth on the 300mm wafer scale will be discussed.

surface catalytic synthesis

graphene

semiconductor thin films

Author

K. B. K. Teo

Aixtron

B. You

Aixtron

N. Rupesinghe

Aixtron

A. Newham

Aixtron

P. Greenwood

Aixtron

S. Buttress

Aixtron

M. T. Cole

Aixtron

L. Tao

University of Texas

J. Lee

University of Texas

D. Akinwande

University of Texas

K. Celebi

Swiss Federal Institute of Technology in Zürich (ETH)

H. Park

Swiss Federal Institute of Technology in Zürich (ETH)

Jie Sun

Chalmers, Microtechnology and Nanoscience (MC2), Quantum Device Physics

Proceedings of the IEEE Conference on Nanotechnology

19449399 (ISSN) 19449380 (eISSN)

1200-1203
9781479906758 (ISBN)

Subject Categories (SSIF 2011)

Condensed Matter Physics

DOI

10.1109/NANO.2013.6720922

ISBN

9781479906758

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