A direct method to extract effective geometries and series resistances of MOS transistors
Paper in proceeding, 1994
Circuit synthesis
Optimization methods
Linear regression
Condition monitoring
SPICE
Solid state circuits
Electric resistance
MOSFETs
Geometry
Threshold voltage
Author
Peter R. Karlsson
Department of Solid State Electronics
Kjell Jeppson
Department of Solid State Electronics
Department of Microelectronics and Nanoscience
Proceedings of the International Conference on Microelectronic Test Structures ICMTS
Vol. 1994 22-25 March 1994
0-7803-1757-2 (ISBN)
Subject Categories
Electrical Engineering, Electronic Engineering, Information Engineering
DOI
10.1109/ICMTS.1994.303479