Substrate Noise Coupling in Mixed-Signal Integrated Circuits: Compact Modeling and Grounding Strategies
Doctoral thesis, 2007

Integration of digital and analog circuits on the same chip is the result of the microelectronic industry's strive for low-cost, small, hand-held products. However, these mixed-signal circuits can experience interference problems; digital circuits inject noise into the substrate which is transmitted throughout the chip and received by sensitive analog circuits. This substrate noise can therefore degrade the performance of the chip. When performing noise coupling analysis, accurate substrate models are needed. Previous compact models were either based on two dimensional simulations, which is not sufficient since the substrate problem is inherently three dimensional, or required extraction of empirical parameters, which makes the models less predictable. This thesis presents accurate compact substrate models which can predict the noise coupling of integrated circuits. A physics-based modeling approach has been employed to yield scalable and predictive three dimensional models. Such models for uniformly doped substrates have been considered in detail since most models presented in the research literature are for epitaxial substrate types. Furthermore, general models for multi-layer substrates and arbitrary aggressor and victim geometries are presented as well. The substrate models have been utilized for investigating the efficiency of several substrate biasing methods, such as guard bands, guard rings, and distributed grounds. It was concluded that distributed grounding was the most effective. The performance of an active decoupling circuit has also been studied applying our substrate models. It was shown that dc grounding is equally good as active decoupling, for all reasonable values of the substrate resistivity.

active noise reduction

substrate noise coupling modeling

elliptic integrals.

grounding resistance

Mixed-signal integrated circuits

z-parameter

substrate resistance

surface potential

Kollektorn (A423), MC2
Opponent: Professor Xavier Aragonès, Universitat Politècnica de Catalunya, Barcelona, Spain

Author

Simon Kristiansson

Chalmers, Applied Physics, Physical Electronics

Resistance Modeling in 1D, 2D, and 3D for Substrate Networks

Physica Scripta,; Vol. T114(2004)p. 217-222

Journal article

Compact Spreading Resistance Model for Rectangular Contacts on Uniform and Epitaxial Substrates

IEEE Transactions on Electron Devices,; Vol. 54(2007)p. 2531-2536

Journal article

Modeling of Rectangular Contacts for Noise Coupling Analysis in Homogeneous Substrates

23rd Norchip Conference, Oulu, Finland,; (2005)

Paper in proceeding

Properties and Modeling of Ground Structures for Reducing Substrate Noise Coupling in ICs

IEEE International Symposium on Circuits and Systems,; (2006)

Paper in proceeding

Evaluation of Using Active Circuitry for Substrate Noise Suppression

ACM Great Lakes Symposium on VLSI (GLSVLSI),; (2007)p. 449-452

Paper in proceeding

Substrate Resistance Modeling for Noise Coupling Analysis

International Conference on Microelectronics Test Structures, Monterey, California, USA,; (2003)

Paper in proceeding

A Surface Potential Model for Predicting Substrate Noise Coupling in Integrated Circuits

IEEE Journal of Solid-State Circuits,; Vol. 40(2005)p. 1797-1803

Journal article

Subject Categories

Other Electrical Engineering, Electronic Engineering, Information Engineering

ISBN

978-91-7385-004-9

Technical report MC2 - Department of Microtechnology and Nanoscience, Chalmers University of Technology: mc2-105

Doktorsavhandlingar vid Chalmers tekniska högskola. Ny serie: 2685

Publisher

Chalmers

Kollektorn (A423), MC2

Opponent: Professor Xavier Aragonès, Universitat Politècnica de Catalunya, Barcelona, Spain

More information

Latest update

4/10/2024