Properties of Metal/High-k Oxide/Graphene Structures
Paper in proceeding, 2017

The challenge of interpreting experimental data from capacitance versus voltage (C-V) measurements on metal/high-k oxide/graphene (MOG) structures is discussed. Theoretical expressions for the influence of interface states, bulk oxide traps, measurement frequency, temperature and puddles are derived and compared with experiments. The nature of oxide traps and their impact on C-V data is treated especially from the view of electron-lattice interaction at electron emission and capture and possible performance as border traps, resembling interface states. We find that characterization on detailed physical origins leading to effects on C-V data is a more complicated issue than the corresponding analysis of metal/oxide/semiconductor (MOS) structures.

Author

Olof Engström

Chalmers, Microtechnology and Nanoscience (MC2), Terahertz and Millimetre Wave Laboratory

M. C. Lemme

RWTH Aachen University

University of Siegen

AMO

Omid Habibpour

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

ECS Transactions

19386737 (ISSN) 19385862 (eISSN)

Vol. 80 1 157-176
978-1-62332-470-4 (ISBN)

Symposium on Semiconductors, Dielectrics, and Metals for Nanoelectronics 15 - In Memory of Samares Ka held during the 232nd Meeting of the Electrochemical-Society (ECS)
National Harbor, USA,

Subject Categories

Inorganic Chemistry

Atom and Molecular Physics and Optics

Condensed Matter Physics

DOI

10.1149/08001.0157ecst

More information

Latest update

3/27/2018