Ionotronic WS2 memtransistors for 6-bit storage and neuromorphic adaptation at high temperature

Journal article, 2023

Inspired by massive parallelism, an increase in internet-of-things devices, robust computation, and Big-data, the upsurge research in building multi-bit mem-transistors is ever-augmenting with different materials, mechanisms, and state-of-the-art architectures. Herein, we demonstrate monolayer WS2-based functional mem-transistor devices which address nonvolatility and synaptic operations at high temperature. The ionotronic memory devices based on WS2 exhibit reverse hysteresis with memory windows larger than 25 V, and extinction ratio greater than 106. The mem-transistors show stable retention and endurance greater than 100 sweep cycles and 400 pulse cycles in addition to 6-bit (64 distinct nonvolatile storage levels) pulse-programmable memory features ranging over six orders of current magnitudes (10−12–10−6A). The origin of the multi-bit states is attributed to the carrier dynamics under electrostatic doping fluctuations induced by mobile ions, which is illustrated by employing a fingerprint mechanism including band-bending pictures. The credibility of all the storage states is confirmed by obtaining reliable signal-to-noise ratios. We also demonstrate key neuromorphic behaviors, such as synaptic plasticity, near linear potentiation, and depression, rendering it suitable for successful implementation in high temperature neuromorphic computing. Furthermore, artificial neural network simulations based on the conductance weight update characteristics of the proposed ionotronic mem-transistors are performed to explore the potency for accurate image recognition. Our findings showcase a different class of thermally aided memories based on 2D semiconductors unlocking promising avenues for high temperature memory applications in demanding electronics and forthcoming neuromorphic computing technologies.