JOSS: Joint Exploration of CPU-Memory DVFS and Task Scheduling for Energy Efficiency
Paper in proceeding, 2023

Energy-efficient execution of task-based parallel applications is crucial as tasking is a widely supported feature in many parallel programming libraries and runtimes. Currently, state-of-the-art proposals primarily rely on leveraging core asymmetry and CPU DVFS. Additionally, these proposals mostly use heuristics and lack the ability to explore the trade-offs between energy usage and performance. However, our findings demonstrate that focusing solely on CPU energy consumption for energy-efficient scheduling while neglecting memory energy consumption leaves room for further energy savings. We propose JOSS, a runtime scheduling framework that leverages both CPU DVFS and memory DVFS in conjunction with core asymmetry and task characteristics to enable energy-efficient execution of task-based applications. JOSS also enables the exploration of energy and performance trade-offs by supporting user-defined performance constraints. JOSS uses a set of models to predict task execution time, CPU and memory power consumption, and then selects the configuration for the tunable knobs to achieve the desired energy performance trade-off. Our evaluation shows that JOSS achieves 21.2% energy reduction, on average, compared to the state-of-the-art. Moreover, we demonstrate that even in the absence of a memory DVFS knob, taking energy consumption of both CPU and memory into account achieves better energy savings compared to only accounting for CPU energy. Furthermore, JOSS is able to adapt scheduling to reduce energy consumption while satisfying the desired performance constraints.

power modeling

task scheduling

DVFS

performance modeling

Energy efficiency

Author

Jing Chen

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Madhavan Manivannan

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Bhavishya Goel

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Miquel Pericas

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

52nd International Conference on Parallel Processing (ICPP 2023)

0000-0000 (ISSN)

828-838
979-8-4007-0843-5 (ISBN)

52nd International Conference on Parallel Processing, ICPP 2023
Salt Lake City, USA,

eProcessor: European, extendable, energy- efficient, extreme-scale, extensible, Processor Ecosystem

Swedish Research Council (VR) (2020-06735), 2020-12-01 -- 2022-12-31.

European, extendable, energy-efficient, energetic, embedded, extensible, Processor Ecosystem (eProcessor)

European Commission (EC) (EC/H2020/956702), 2021-01-01 -- 2024-06-30.

Areas of Advance

Information and Communication Technology

Subject Categories

Embedded Systems

Computer Systems

DOI

10.1145/3605573.3605586

More information

Latest update

1/10/2024