Semiconductor device structure with recessed ohmic contacts and method for producing the same
Patent, 2024

The present disclosure relates to a semiconductor device structure (1) comprising: a substrate (10); a Group III-Nitride material channel layer (20) arranged on the substrate (10); a Group III-Nitride material barrier layer (30) arranged on the Group III-Nitride material channel layer (20); an ohmic contact structure (60) comprising a first Ti layer (61) and an Al layer (62) arranged on the first Ti layer (61), wherein the ohmic contact structure (60) is arranged recessed in the Group III-Nitride material barrier layer (30) such that the bottom of the first Ti layer (61) extends below a 2DEG channel level (2DEG) provided by the Group III-Nitride channel layer and Group III-Nitride material barrier layer (20, 30), the first Ti layer (61) provided with angled sidewalls (61a) with a sidewall angle 40° ≤ θ ≤ 75°, preferably 50° ≤ θ ≤ 60°, as measured as the angle (θ) between the respective angled sidewalls (61a) and a bottom of the Group III-Nitride material barrier layer (30); a thickness of the first Ti layer (61) is equal to or less than 5 nm; a thickness ratio between the first Ti layer (61) and the Al-layer (62) is Ti : Al < 1 : 1000, and a method of producing the same.

Inventor

Ding-Yuan Chen

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Jr-Tai Chen

Niklas Rorsman

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Swegan AB

EP4123721A1

18577810

Subject Categories (SSIF 2011)

Nano Technology

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Latest update

12/24/2024