Downscaled III-Nitride Power HEMTs with Thin GaN Channel Layers: Fabrication, Characterization, and Physics-Based Modeling
Doctoral thesis, 2025
The unique polarization properties of the III-nitride materials have motivated
research into gallium nitride (GaN)-based high-electron-mobility transistors
(HEMTs) for both power electronics and microwave applications. In these devices,
compensation-doped buffer layers and strain-relief layers are typically incorporated
into the III-nitride layer stack to reduce off-state currents and to achieve high-crystalquality
GaN and aluminum GaN (AlGaN) layers. However, thin-channel
AlGaN/GaN/AlN heterostructures have been presented as a viable alternative to the
conventional technology. Among these types of heterostructures, the buffer-free
QuanFINE® concept has been suggested. This material uses the AlN nucleation layer
and the silicon carbide substrate to improve the electron confinement in the GaN
channel layer. In this thesis, high-voltage buffer-free GaN power HEMTs are
evaluated. The devices are characterized in terms of their on-state, off-state, and
dynamic performance. The impact of critical processing modules—including
isolation techniques, dielectrics, and field plate configurations—is investigated. Due
to the high electron confinement in the GaN channel layer, a power figure of merit of
729 MW/cm2 at sub-100 nA/mm drain-source current could be achieved, which is
comparable to most state-of-the-art technologies reported in the literature.
In contrast to heterostructures with buffer designs, no compensation dopants that
can adversely affect the dynamic performance are intentionally incorporated into
GaN or AlN layers. However, it is not fully understood how, or to what extent,
unintentional defects and impurities will affect the dynamic performance in bufferfree
HEMTs. A physics-based technology computer-aided design model is presented
to explain the capture and emission processes involved during and after high-voltage
conditions. It is hypothesized that a highly ionized donor concentration exists in the
GaN layer near the GaN/AlN interface. The trap is thought to be related to defects
and impurities that naturally coalesce near the GaN/AlN interface. These states are
needed to prevent a semipermanent current reduction after high-voltage conditions.
However, it is also shown that the spatial distribution has to be controlled to prevent
excessive off-state drain-source leakage currents.
An alternative measurement technique for estimating drain-induced barrier
lowering in GaN HEMTs is also suggested. The new method is based on the drain
current injection technique (DCIT), which facilitates the measurement of threshold
voltage variations at different drain-source voltages. GaN HEMT with short gate
lengths (LG) and different epitaxial designs were used to demonstrate the viability of
the method. For high-voltage buffer-free HEMTs, the DCIT can be used in the
optimization of channel layer thickness and LG to improve dynamic performance
while minimizing the adverse effects of LG reduction.
Overall, the thesis contributes to the advancement of III-nitride technologies
tailored toward power applications through the development of thin-channel bufferfree
materials.
research into gallium nitride (GaN)-based high-electron-mobility transistors
(HEMTs) for both power electronics and microwave applications. In these devices,
compensation-doped buffer layers and strain-relief layers are typically incorporated
into the III-nitride layer stack to reduce off-state currents and to achieve high-crystalquality
GaN and aluminum GaN (AlGaN) layers. However, thin-channel
AlGaN/GaN/AlN heterostructures have been presented as a viable alternative to the
conventional technology. Among these types of heterostructures, the buffer-free
QuanFINE® concept has been suggested. This material uses the AlN nucleation layer
and the silicon carbide substrate to improve the electron confinement in the GaN
channel layer. In this thesis, high-voltage buffer-free GaN power HEMTs are
evaluated. The devices are characterized in terms of their on-state, off-state, and
dynamic performance. The impact of critical processing modules—including
isolation techniques, dielectrics, and field plate configurations—is investigated. Due
to the high electron confinement in the GaN channel layer, a power figure of merit of
729 MW/cm2 at sub-100 nA/mm drain-source current could be achieved, which is
comparable to most state-of-the-art technologies reported in the literature.
In contrast to heterostructures with buffer designs, no compensation dopants that
can adversely affect the dynamic performance are intentionally incorporated into
GaN or AlN layers. However, it is not fully understood how, or to what extent,
unintentional defects and impurities will affect the dynamic performance in bufferfree
HEMTs. A physics-based technology computer-aided design model is presented
to explain the capture and emission processes involved during and after high-voltage
conditions. It is hypothesized that a highly ionized donor concentration exists in the
GaN layer near the GaN/AlN interface. The trap is thought to be related to defects
and impurities that naturally coalesce near the GaN/AlN interface. These states are
needed to prevent a semipermanent current reduction after high-voltage conditions.
However, it is also shown that the spatial distribution has to be controlled to prevent
excessive off-state drain-source leakage currents.
An alternative measurement technique for estimating drain-induced barrier
lowering in GaN HEMTs is also suggested. The new method is based on the drain
current injection technique (DCIT), which facilitates the measurement of threshold
voltage variations at different drain-source voltages. GaN HEMT with short gate
lengths (LG) and different epitaxial designs were used to demonstrate the viability of
the method. For high-voltage buffer-free HEMTs, the DCIT can be used in the
optimization of channel layer thickness and LG to improve dynamic performance
while minimizing the adverse effects of LG reduction.
Overall, the thesis contributes to the advancement of III-nitride technologies
tailored toward power applications through the development of thin-channel bufferfree
materials.
AlGaN/GaN
downscaling
simulations
DCIT
DIBL
TCAD
breakdown
traps
SCE
HEMT
high-voltage
power electronics
buffer-free
Kollektorn
Opponent: Dr. Oliver Hilt, Ferdinand-Braun-Institut, Berlin, Germany
Author
Björn Hult
Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics
Björn H., Alok R., Lunjie Z., Eva O., Niklas R., Andrei V. Investigation of Electrical Breakdown in AlGaN/GaN/AlN HEMTs Through Nanoscale Analysis and Physical Modeling
Björn H., Johan B., Jr-Tai C., Hans H., Vanya D., Niklas R., Measurement and Physics-Based Modeling of Traps at the GaN/AlN Interface and their Effect on Drain Current Recovery in Double Heterostructure AlGaN/GaN/AlN HEMTs
Gallium nitride (GaN) is a semiconductor material that allows for the fabrication of high-electron mobility transistors (HEMTs), which can switch faster and with lower energy losses compared to conventional Si-based switching devices. These components pave the way for more compact and efficient power electronic converters. Currently, GaN-based HEMTs have started to penetrate the market, primarily in low-voltage applications such as USB mobile chargers and power supply units for computers. The viability of the GaN-based HEMTs for applications with higher voltage requirements is heavily dependent on the time and the complexity of the manufacturing process of the semiconductor material.
In this thesis, a GaN-based material using a novel manufacturing process that allows for a substantial reduction of the production time and material complexity is evaluated in terms of its high-voltage electrical properties. HEMTs are fabricated in Chalmers’ cleanroom laboratory, electrically characterized, and then compared to other state-of-the-art HEMT technologies. It is shown that this type of material can compete with other standard GaN materials in terms of its high-voltage performance.
GaN-based HEMTs typically suffer from performance degradation due to so-called charge trapping effects. These effects result in a reduction of the current that the transistor can conduct in its on-state condition after it has been in a high-voltage off-state. Using advanced physics-based simulations, a model is presented in the thesis to try to explain the underlying mechanisms that give rise to the current-degrading trapping effects in the new GaN-based material.
Lastly, a novel electrical characterization method is presented. This method facilitates the performance evaluation of GaN HEMTs operating at low voltages but high frequencies, enabling more effective optimization of critical device design parameters.
The thesis contributes to the progression of power electronic GaN-based technologies, and by extension, to more efficient power converters.
In this thesis, a GaN-based material using a novel manufacturing process that allows for a substantial reduction of the production time and material complexity is evaluated in terms of its high-voltage electrical properties. HEMTs are fabricated in Chalmers’ cleanroom laboratory, electrically characterized, and then compared to other state-of-the-art HEMT technologies. It is shown that this type of material can compete with other standard GaN materials in terms of its high-voltage performance.
GaN-based HEMTs typically suffer from performance degradation due to so-called charge trapping effects. These effects result in a reduction of the current that the transistor can conduct in its on-state condition after it has been in a high-voltage off-state. Using advanced physics-based simulations, a model is presented in the thesis to try to explain the underlying mechanisms that give rise to the current-degrading trapping effects in the new GaN-based material.
Lastly, a novel electrical characterization method is presented. This method facilitates the performance evaluation of GaN HEMTs operating at low voltages but high frequencies, enabling more effective optimization of critical device design parameters.
The thesis contributes to the progression of power electronic GaN-based technologies, and by extension, to more efficient power converters.
Center for III Nitride semiconductor technology (C3NiT) fas2
VINNOVA (2022-03139), 2022-11-21 -- 2027-12-31.
Infrastructure
Kollberg Laboratory
Myfab (incl. Nanofabrication Laboratory)
Areas of Advance
Nanoscience and Nanotechnology
Subject Categories (SSIF 2025)
Other Electrical Engineering, Electronic Engineering, Information Engineering
Condensed Matter Physics
ISBN
978-91-8103-273-4
Doktorsavhandlingar vid Chalmers tekniska högskola. Ny serie: 5731
Publisher
Chalmers
Kollektorn
Opponent: Dr. Oliver Hilt, Ferdinand-Braun-Institut, Berlin, Germany