Instruction level energy model for the Adapteva Epiphany multi-core processor
Paper in proceedings, 2017

Processor energy models can be used by developers to estimate, without the need of hardware implementation or additional measurement setups, the power consumption of so ware applications. Furthermore, these energy models can be used for energy-aware compiler optimization. is paper presents a measurement-based instruction-level energy characterization for the Adapteva Epiphany processor, which is a 16-core shared-memory architecture connected by a 2D network-on-chip. Based on a number of microbenchmarks, the instruction-level characterization was used to build an energy model that includes essential Epiphany instructions such as remote memory loads and stores. To validate the model, an FFT application was developed. is validation showed that the energy estimated by the model is within 0.4% of the measured energy.

Author

Gabriel Ortiz

Chalmers, Computer Science and Engineering (Chalmers)

Lars Svensson

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Erik Alveflo

Chalmers, Computer Science and Engineering (Chalmers)

Per Larsson-Edefors

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

14th ACM International Conference on Computing Frontiers, CF 2017, Siena, Italy, 15-17 May 2017

380-384

Areas of Advance

Information and Communication Technology

Subject Categories

Embedded Systems

Computer Systems

DOI

10.1145/3075564.3078892

ISBN

978-1-4503-4487-6

More information

Created

10/8/2017