Formal verification of PLC controlled systems using sensor graphs
Paper i proceeding, 2009

This paper describes how a system, consisting of a discrete controller (e.g. a PLC) that controls a physical plant/process, can be formally verified. The physical process is assumed to be modeled using Sensor Graphs, a discrete event modeling language directed at physical systems with binary and identity sensors (e.g. RFID). The formal and graphical syntaxes of Sensor Graphs are presented and exemplified. The "semitimed" semantics is defined considering a process model together with a controller model, represented as a discrete state equation. Finally, it is shown how requirements on the closedloop system, represented by a Sensor Graph and a controller model, can be verified using the model checker Cadence SMV.

Författare

Tord Alenljung

Chalmers, Signaler och system, System- och reglerteknik, Automation

Bengt Lennartson

Chalmers, Signaler och system, System- och reglerteknik, Automation

2009 IEEE Conference on Automation Science and Engineering, CASE 2009, Bangalore, India

164-170

Ämneskategorier

Elektroteknik och elektronik

DOI

10.1109/COASE.2009.5234187

ISBN

978-142444578-3

Mer information

Skapat

2017-10-07