ZEBRA: A data-centric, hybrid-policy hardware transactional memory design
Paper i proceeding, 2011

Hardware Transactional Memory (HTM) systems, in prior research, have either fixed policies of conflict resolution and data versioning for the entire system or allowed a degree of flexibility at the level of transactions. Unfortunately, this results in susceptibility to pathologies, lower average performance over diverse workload characteristics or high design complexity. In this work we explore a new dimension along which flexibility in policy can be introduced. Recognizing the fact that contention is more a property of data rather than that of an atomic code block, we develop an HTM system that allows selection of versioning and conflict resolution policies at the granularity of cache lines. We discover that this neat match in granularity with that of the cache coherence protocol results in a design that is very simple and yet able to track closely or exceed the performance of the best performing policy for a given workload. It also brings together the benefits of parallel commits (inherent in traditional eager HTMs) and good optimistic concurrency without deadlock avoidance mechanisms (inherent in lazy HTMs), with little increase in complexity.

hardware transactional memory

contention management

Författare

R. Titos-Gil

Universidad de Murcia

Anurag Negi

Chalmers, Data- och informationsteknik, Datorteknik

M. E. Acacio

Universidad de Murcia

J. M. García

Universidad de Murcia

Per Stenström

Chalmers, Data- och informationsteknik, Datorteknik

Proceedings of the International Conference on Supercomputing, ICS 2011. Tucson, 31 May-4 June 2011

53-62

Ämneskategorier

Data- och informationsvetenskap

DOI

10.1145/1995896.1995906

ISBN

978-145030102-2

Mer information

Skapat

2017-10-06