Influence of interlayer properties on the characteristics of high-k gate stacks
Artikel i vetenskaplig tidskrift, 2012

The significance of interface sharpness between interlayers and high-k oxides for the properties of transistor gate-stacks has been investigated. Energy band variation in the oxide is calculated by using literature data for the HfO2/SiO2 interface, assuming two different cases for the interface plane: flat with a gradual depth variation of k-value and rough with an abrupt change of k. We demonstrate that the capacitive properties are similar, whereas tunneling properties considerably differ between the two cases. Furthermore, depth distributions of tunneling effective mass and dielectric constant have a substantial influence on the probability for charge carrier tunneling through the oxide stack and for the determination of capacitance equivalent oxide thickness (CET).

oxide

Interlayer

High-k dielectric

films

MOS

C-V

dielectrics

hfo2

Tunneling probability

interface

chemical-vapor-deposition

Författare

Olof Engström

Chalmers, Mikroteknologi och nanovetenskap (MC2), Terahertz- och millimetervågsteknik

I. Z. Mitrovic

University of Liverpool

S. Hall

University of Liverpool

Solid-State Electronics

0038-1101 (ISSN)

Vol. 75 63-68

Ämneskategorier

Annan teknik

DOI

10.1016/j.sse.2012.04.042

Mer information

Senast uppdaterat

2018-02-28