TLB and Snoop Energy-Reduction using Virtual Caches for Low-Power Chip-Multiprocessors
Paper i proceeding, 2002

In our quest to bring down the power consumption in low-power chip-multiprocessors, we have found that TLB and snoop accesses account for about 40% of the energy wasted by all L1 data-cache accesses. We have investigated the prospects of using virtual caches to bring down the number of TLB accesses. A key observation is that while the energy wasted in the TLBs are cut, the energy associated with snoop accesses becomes higher. We then contribute with two techniques to reduce the number of snoop accesses and their energy cost. Virtual caches together with the proposed techniques are shown to reduce the energy wasted in the L1 caches and the TLBs by about 30%.

Författare

Magnus Ekman

Chalmers, Institutionen för datorteknik

F. Dahlgren

Per Stenström

Chalmers, Institutionen för datorteknik

Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002. ISLPED '02

243-246

Ämneskategorier

Datorteknik

DOI

10.1109/LPE.2002.146746

ISBN

1-5811-3475-4

Mer information

Skapat

2017-10-07