Wafer bonding and smartcut for formation of silicon-on-insulator materials
Paper i proceeding, 1998

Silicon-on-insulator (SOI) materials are expected to get an increased attention for mainstream CMOS as well as for high frequency or high voltage applications. Of the existing methods for manufacture of SOI materials, wafer bonding combined with smartcut seems to be the most promising approach. In the case of wafer bonding, surface micro-roughness, wafer dimensions, surface chemistry and ambient pressure all influence the result. In the smartcut technology, hydrogen implantation and an annealing step can be controlled for a precise splitting of a silicon wafer, thereby forming a thin silicon film. In this presentation the application of wafer bonding and smartcut for formation of SOI materials will be reviewed.

Pressure effects

CMOS integrated circuits


Silicon on insulator technology

Silicon wafers

Surface chemistry

Ion implantation


Surface roughness


Stefan Bengtsson

Institutionen för mikroelektronik, Fasta tillståndets elektronik

International Conference on Solid-State and Integrated Circuit Technology Proceedings



Annan elektroteknik och elektronik