HARP: Adaptive Abort Recurrence Prediction for Hardware Transactional Memory
Paper i proceeding, 2013

Hardware Transactional Memory (HTM) exposes parallelism by allowing possibly conflicting sections of code, called transactions, to execute concurrently in multithreaded applications. However, conflicts among concurrent transactions result in wasted computation and expensive rollbacks. Under high contention HTM protocol overheads can, in many cases, amount to several times the useful work done. Blindly scheduling transactions in the presence of contention is therefore clearly suboptimal from a resource utilization standpoint, especially in situations where several scheduling options exist. This paper presents HARP (Hardware Abort Recurrence Predictor), a hardware-only mechanism to avoid speculation when it is likely to fail. Inspired by branch prediction strategies and prior work on contention management and scheduling in HTM, HARP uses past behavior of transactions and locality in conflicting memory references to accurately predict conflicts. The prediction mechanism adapts to variations in workload characteristics and enables better utilization of computational resources. We show that an HTM protocol that integrates HARP exhibits reductions in both wasted execution time and serialization overheads when compared to prior work, leading to a significant increase in throughput (~30%) in both single-application and multi-application scenarios.


Adria Arjemash

Osman Unsal

Anurag Negi

Chalmers, Data- och informationsteknik, Datorteknik

Per Stenström

Chalmers, Data- och informationsteknik, Datorteknik

Adrian Cristal

20th Annual International Conference on High Performance Computing, HiPC 2013



Informations- och kommunikationsteknik


Elektroteknik och elektronik