A systematic evaluation of emerging mesh-like CMP NoCs
Paper i proceeding, 2015

This paper studies alternative Network-on-Chip architectures for emerging many-core chip multiprocessors, by exploring the following design options on mesh-based networks: Multiple physical networks (P), cores concentration (C), express channels (X), it widths (W), and virtual channels (V). We exhaustively evaluate all combinations of the afore-mentioned parameters (P, C, X, W, V), using the energy-throughput ratio (ETR) as a metric to classify network congurations. Our experimental results show that, on one hand, with an appropriate selection of parameters (V,W), an optimized baseline 2D mesh offers the best possible ETR for NoCs with up to a few tens of cores (64-core NoC). More complicated networks, using concentration and express channels, can reduce the zero-load latency, but do not necessarily help to improve ETR. On the other hand, for larger CMPs, a 2D mesh with multiple physical networks is a better option: once optimized, this architectural choice can reduce the ETR by up to 46% for 256 cores.

mesh

virtual channels

flit widths

energy

multiple networks

express channels

energy to throughput

latency

concentration

Network-on-chip

Författare

A. Psathakis

Institute of Computer Science Crete

Vasileios Papaefstathiou

Chalmers, Data- och informationsteknik, Datorteknik

N. Chrysos

Institute of Computer Science Crete

F. Chaix

Institute of Computer Science Crete

Evangelos Vasilakis

Institute of Computer Science Crete

Dionisios N. Pnevmatikatos

Institute of Computer Science Crete

M. Katevenis

Institute of Computer Science Crete

ANCS 2015 - 11th 2015 ACM/IEEE Symposium on Architectures for Networking and Communications Systems

159-170
978-1-4673-6633-5 (ISBN)

Ämneskategorier

Energiteknik

Elektroteknik och elektronik

DOI

10.1109/ANCS.2015.7110129

ISBN

978-1-4673-6633-5

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Senast uppdaterat

2019-11-06