Vasileios Papaefstathiou
Visar 22 publikationer
HighwayNoC: Approaching Ideal NoC Performance With Dual Data Rate Routers
UNILOGIC: A Novel Architecture for Highly Parallel Reconfigurable Systems
Hybrid2: Combining Caching and Migration in Hybrid Memory Systems
Decoupled fused cache: Fusing a decoupled LLC with a DRAM cache
LLC-guided data migration in hybrid memory systems
FusionCache: Using LLC tags for DRAM cache
FreewayNoC: A DDR NoC with Pipeline Bypassing
DDRNoC: Dual Data-Rate Network-on-Chip
Global dead-block management for task-parallel programs
ProFess: A Probabilistic Hybrid Main Memory Management Framework for High Performance and Fairness
Runtime-Assisted Global Cache Management for Task-based Parallel Programs
Odd-ECC: On-demand DRAM error correcting codes
SLOOP: QoS-Supervised Loop Execution to Reduce Energy on Heterogeneous Architectures
A Case for Runtime-Assisted Global Cache Management
RADAR: Run-time assisted Dead-Region Management for Last-Level Caches
RADAR: Runtime-assisted dead region management for last-level caches
ECOSCALE: Reconfigurable computing and runtime system for future exascale systems
Adaptive row addressing for cost-efficient parallel memory protocols in large-capacity memories
ProF: Probabilistic Hybrid Main Memory Management for High Performance and Fairness
A systematic evaluation of emerging mesh-like CMP NoCs
Design trade-offs in energy efficient NoC architectures
RADAR: Runtime-Assisted Dead Region Management for Last-Level Caches
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Energy-efficient Heterogeneous COmputing at exaSCALE (ECOSCALE)