A parallel hierarchical design rule checker
Paper i proceeding, 1992
The halo algorithm, a novel and efficient algorithm for hierarchical design-rule checking (DRC) has been modified for parallel processing. Like the sequential halo algorithm, the parallel version identifies repeated subcell interactions and checks them only once thereby improving performance substantially. Inverse layout trees are used to handle interacting primitives hierarchically. The algorithm has been implemented on workstations connected by a local area network and on a shared memory multicomputer.
Data structures
Parallel processing
Concurrent computing
Wires
Workstations
Data mining
Testing
Solid state circuits
Local area networks
Very large scale integration
Författare
Nils Hedenstierna
Institutionen för fasta tillståndets elektronik
Kjell Jeppson
Institutionen för fasta tillståndets elektronik
Institutionen för mikroelektronik och nanovetenskap
[3rd] European Conference on Design Automation
Vol. 1992 142-146
0-8186-2645-3 (ISBN)
Ämneskategorier
Elektroteknik och elektronik
ISBN
0-8186-2645-3