CrossFetch: A Prefetching Scheme for Cross-Page Prefetching in the Physical Address Space
Artikel i vetenskaplig tidskrift, 2026

Prefetching is an important technique to reduce the miss penalty in deep memory hierarchies, employing multiple levels of cache and memory. Unfortunately, state-of-the-art techniques avoid prefetching across page boundaries in physically addressed memory because contiguous virtual pages are not guaranteed to map to contiguous physical pages. Apart from low accuracy, prefetching across page boundaries can break protection domains, opening up security vulnerabilities. This paper proposes CrossFetch - the first prefetching technique that accurately and securely prefetches data across physical page boundaries. It uses a simple and novel translation mechanism that combines a conventional TLB, called forward TLB (FTLB), with a reverse TLB (RTLB) that provides mappings of physical pages to virtual. CrossFetch leverages a conventional Page Table Walker invoked by a conventional TLB to load mappings into the FTLB and RTLB. The paper demonstrates how CrossFetch can hide far-memory misses in hybrid main-memory systems and last-level cache misses. We show that CrossFetch can improve IPC by 5.7% (up to 27.7%) compared to intra-page prefetchers on SPEC2017 benchmarks where the tolerance of far-memory misses dominates.

Nonvolatile memory

Metadata

translation-lookaside buffer (TLB)

Accuracy

Translation

Random access memory

Benchmark testing

hybrid memory

Artificial intelligence

Frequency modulation

Security

heterogeneous memory systems

Prefetching

Författare

Qi Shao

Göteborgs universitet

Chalmers, Data- och informationsteknik, Datorteknik

Per Stenström

Chalmers, Data- och informationsteknik, Datorteknik

Göteborgs universitet

IEEE Computer Architecture Letters

1556-6056 (ISSN) 15566064 (eISSN)

Vol. 25 1 1-4

Ämneskategorier (SSIF 2025)

Datavetenskap (datalogi)

Datorteknik

Datorsystem

DOI

10.1109/LCA.2025.3640965

Mer information

Senast uppdaterat

2026-01-12