Verification of Process Operations Using Model Checking
Paper i proceeding, 2009

In order to decrease time to market for products it is important to decrease the time for implementation and debugging of the control logic that are used to manufacture the products. In this paper, an approach based on a high-level specification of the relations between process operations and resources and the use of formal verification is presented. By using formal verification it is possible to find potential errors within the specification at an early stage in the development process. In this work it is shown how the high-level specifications may be translated into extended finite automata, and how these extended finite automata may be efficiently verified using the symbolic model checking tool, NuSMV. It is also shown how the presented approach is suitable for verification of general supervisory control properties like controllability and non-blocking.

model checking

formal verification

industrial automation

Författare

Alexey Voronov

Chalmers, Signaler och system, System- och reglerteknik, Automation

Knut Åkesson

Chalmers, Signaler och system, System- och reglerteknik, Automation

Automation Science and Engineering, 2009. CASE 2009. IEEE International Conference on

415-420

Styrkeområden

Produktion

Ämneskategorier

Systemvetenskap

Datavetenskap (datalogi)

DOI

10.1109/COASE.2009.5234103

ISBN

978-1-4244-4578-3

Mer information

Skapat

2017-10-07