Daniel Eckerbert

Publications (8)
Projects (0)

Showing 8 publications

2006

Toward Architecture-Based Test-Vector Generation for Timing Verification of Fast Parallel Multipliers

Henrik Eriksson, Per Larsson-Edefors, Daniel Eckerbert

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Journal article

2004

A Power Cut-Off Technique for Gate Leakage Suppression

Mindaugas Drazdziulis, Per Larsson-Edefors, Daniel Eckerbert et al

European Solid-State Circuits Conference (ESSCIRC), p. 171-174

Paper in proceeding

2003

A Deep Submicron Power Estimation Methodology Adaptable to Variations Between Power Characterization and Estimation

Daniel Eckerbert, Per Larsson-Edefors

Proceedings of Asia South-Pacific Design Automation Conference (ASPDAC), Kitakyushu, 21-24 January 2003. Vol. 2003-January, p. 716-719

Paper in proceeding

2003

A 3.5GHz 32mW 150nm Multiphase Clock Generator for High-Performance Microprocessors

A. Alvandpour, R.K. Krishnamurthy, Daniel Eckerbert et al

Digest of Technical Papers. IEEE International Solid-State Circuits Conference, 9-13 February 2003

Paper in proceeding

2003

A Mixed-Mode Delay-Locked Loop Architecture

Daniel Eckerbert, Lars Svensson, Per Larsson-Edefors

Proceedings of the 21st International Conference on Computer Design (ICCD), San Jose, 13-15 October 2003, p. 261-263

Paper in proceeding

2003

Multi-Phase Clock Generation and Synchronization

Atila Alvandpour, Daniel Eckerbert, Ram K. Krishnamurthy

Patent

2003

Dual Threshold Voltage Circuits in the Presence of Resistive Interconnects

Per Larsson-Edefors, Daniel Eckerbert, Henrik Eriksson et al

Proceedings of IEEE Computer Society Annual Symposium on VLSI

Paper in proceeding

2003

Power Estimation and Multi-Phase Clock Generation for the Deep Submicron Era

Daniel Eckerbert

Doctoral thesis

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