Toward Architecture-Based Test-Vector Generation for Timing Verification of Fast Parallel Multipliers
Journal article, 2006
Author
Henrik Eriksson
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
Per Larsson-Edefors
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
Daniel Eckerbert
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Subject Categories
Other Electrical Engineering, Electronic Engineering, Information Engineering