A Power Cut-Off Technique for Gate Leakage Suppression

Paper in proceeding, 2004

Gate leakage power dissipation is predicted to overtake subthreshold leakage power within the next few years thus adding further problems for designers trying to meet a strict power budget. In this paper a power cut-off technique is proposed, which in steep mode suppresses not only subthreshold leakage but also gate leakage. The proposed technique displays a combination of low total leakage power and short wake-up time.