Lars Bengtsson

2017

A High Throughput Anticollision Protocol to Decrease the Energy Consumption in a Passive RFID System

An energy and identification time decreasing procedure for memoryless RFID Tag Anti-Collision Protocols

Simplified computation in memoryless anticollision RFID identification protocols

Development of a Voice Controlled UHF Radio

An Active Backscatter Wake-up and Tag Identification Extraction Protocol for Low Cost and Low Power Active RFID

A Snoozing Frequency Binary Tree Protocol

2010

An Energy and Application Scenario Aware Active RFID Protocol

An Application Dependent Medium Access Protocol for Active RFID Using Dynamic Tuning of the Back-off Algorithm

Collaborative structures in early-stage biotech research commercialization

Selecting Back-Off Algorithm in Active RFID CSMA/CA Based Medium-Access Protocols

Forward and Reverse Converters and Moduli Set Selection in Signed-Digit Residue Number Systems

A New Master's Program in Integrated Electronic System Design

Leakage-Conscious Architecture-Level Power Estimation for Partitioned and Power-Gated SRAM Arrays

Protocols for Active RFID - The Energy Consumption Aspect

Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration

"Towards an Energy Efficient Protocol for Active RFID"

Reverse Converter Architectures for Signed-Digit Residue Systems

The REMAP Reconfigurable Architecture: a Retrospective

A Low-Power FIR Filter Using Combined Residue and Radix-2 Signed-Digit Representation

Jalapeno - Decentralized Grid Computing Using Peer-to-Peer Technology

Table Based Total Power Consumption Estimation Approach for Architects

Table-Based Total Power Consumption Estimation of Memory Arrays for Architects

Theory of a room-temperature silicon quantum dot device as a sensitive electrometer

Models for Power Consumption Estimation in the DSP-PP Simulator

DSP-PP: A Simulator/Estimator of Power consumption and Performance for Parallel DSP Architectures

A VLSI Array Architecture for Artificial Neural Networks

Arithmetic circuits combining residue and signed-digit representations

Grid Computing Distribution Using Network Processors

"Synchronizing a High-Speed SIMD Processor Array"

"Basic Matrix Operations on a DSP Array Architecture"

Large-Signal Modeling of Microwave Transistors

REMAP-γ: A Scalable SIMD VLSI Architecture with Hierarchical Control

Nonlinear transistor models for microwave and millimeterwave circuits

Extensions of the Chalmers nonlinear HEMT and MESFET model

Multiplex Wiring Systems for Automobile Vehicles