Low-Power Low-Latency BCH Decoders for Energy-Efficient Optical Interconnects

Journal article, 2017

Since energy dissipation and latency in optical interconnects are of utmost concern, such links are often operated without forward error correction. We propose a low-complexity non-iterative 2-error correcting BCH decoder circuit that significantly relaxes the stringent optical modulation amplitude requirements on the transmitter, which help to reduce laser and laser driver energy. We demonstrate, in a 28-nm CMOS process technology, that the introduction of this BCH circuit in an uncoded link leads to energy-per-bit reductions of 25%, even when impact of code rate on receiver energy dissipation is considered.