Implementation and Evaluation of Signal Processing Circuits for Optical Communication

Doctoral thesis, 2024

The digital signal processing (DSP) circuits used in the fiber-optic communication links that make up the backbone of the Internet can be a significant contributor the over-all power dissipation of a link. As the number of connected users and their bandwidth requirements are expected to continue to grow over the coming years, the development of power-efficient high-throughput DSP systems is a critical factor in enabling this growth. Unfortunately, DSP designers can no longer depend on foundries delivering faster and more power-efficient circuits for each new process node, due to both economical and physical limitations. As a result, more stringent speed and power requirements are put on the circuit designs.

Carrier phase recovery (CPR) is one subsystem of a typical DSP system for fiber-optic communication. In this thesis, we explore and evaluate circuit designs of multiple types of CPR, with a focus on single-mode systems. The circuit designs allow us to uncover trade-offs between power dissipation, area, throughput and signal degradation, for different types of systems employing a range of modulation formats. Coupled-core multi-mode fiber systems have been suggested as a way to increase throughput by utilizing also the spatial dimension, and this thesis describes a multiple-input multiple-output adaptive equalizer targeting these systems. The equalizer circuit enables exploration of how this critical subsystem scales to higher core counts. Additionally, we describe a circuit verification and evaluation environment that has the potential to speed up simulations by orders of magnitude by emulating a fiber-optic link onboard an application-specific integrated circuit or a field-programmable gate array.