Unfolded SiBM BCH Decoders for High-Throughput Low-Latency Applications
Paper in proceeding, 2024

Low-latency and area-efficient forward error correction is crucial in high-throughput communication scenarios, such as die-to-die connections. Using t to denote error correction capability, we propose a low-latency t-unfolded simplified inverse-free Berlekamp-Massey (SiBM) decoder, which for t > 3 offers a shorter critical path compared with area-efficient Peterson-based decoders. Synthesized in a 22-nm CMOS process, our unfolded SiBM decoders with t = 4 and 5 provide up to 1.39X higher throughput than their Peterson-based counterparts, at comparable area efficiencies.

Author

Xu Wang

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Christoffer Fougstedt

Ericsson

Lars Svensson

VLSI Systems

Per Larsson-Edefors

VLSI Systems

2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Knoxville, USA,

classIC - Chalmers Lund Center for Advanced Semiconductor System Design

Swedish Foundation for Strategic Research (SSF) (CSS22-0003), 2023-06-01 -- 2029-05-31.

Areas of Advance

Information and Communication Technology

Subject Categories

Communication Systems

Embedded Systems

Signal Processing

More information

Latest update

9/23/2024