Unfolded SiBM BCH Decoders for High-Throughput Low-Latency Applications
Paper in proceeding, 2024

Low-latency and area-efficient forward error correction is crucial in high-throughput communication scenarios, such as die-to-die connections. Using t to denote error correction capability, we propose a low-latency t-unfolded simplified inverse-free Berlekamp-Massey (SiBM) decoder, which for t > 3 offers a shorter critical path compared with area-efficient Peterson-based decoders. Synthesized in a 22-nm CMOS process, our unfolded SiBM decoders with t = 4 and 5 provide up to 1.39X higher throughput than their Peterson-based counterparts, at comparable area efficiencies.

Author

Xu Wang

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Christoffer Fougstedt

Ericsson

Lars Svensson

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Per Larsson-Edefors

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI

21593469 (ISSN) 21593477 (eISSN)

216-221
9798350354119 (ISBN)

2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Knoxville, USA,

classIC - Chalmers Lund Center for Advanced Semiconductor System Design

Swedish Foundation for Strategic Research (SSF) (CSS22-0003), 2023-06-01 -- 2029-05-31.

Areas of Advance

Information and Communication Technology

Subject Categories (SSIF 2011)

Communication Systems

Embedded Systems

Signal Processing

DOI

10.1109/ISVLSI61997.2024.00048

More information

Latest update

8/12/2025