A 5G FR1 43.5 dBm GaN Hybrid Doherty Power Amplifier with Dynamic Auxiliary Gate Voltage for Enhanced Gain at Saturation

Paper in proceeding, 2025

This paper presents a dynamic gate bias (DGB) approach to improve the linearity of a Doherty Power Amplifier (DPA) designed for 5G FR1 applications, utilizing Gallium Nitride (GaN) transistors. The amplifier adopts a hybrid implementation on a printed circuit board (PCB), integrating transmission lines (TLs) and lumped discrete elements to optimize performance. Although the Doherty architecture is known for its efficiency advantages under back-off conditions, it encounters challenges such as gain compression at saturation of the main amplifier. To address this limitation, a dynamic gate biasing is used, enhancing the linearity and mitigating gain compression. The DPA fabricated on a Taconic RF-35 substrate with a dielectric constant of 3.5. The amplifier's performance is evaluated through both simulations and measurements. Key metrics, including gain, efficiency, and output power, are assessed for both DPA with standard gate bias and DPA with DGB for auxiliary amplifier, with measurement results demonstrating a peak drain efficiency of 55%, an output power of 43.5 dBm, average gain of 13 dB and a 2 dB improvement in gain compression in case of DGB approach. These outcomes confirm the DPA's suitability for high-linearity, high-efficiency applications within the 5G FR1.