Resistance Modelling in 1D, 2D, and 3D for Substrate Networks
Paper in proceeding, 2003
Author
Shiva P. Kagganti
Chalmers, Microtechnology and Nanoscience (MC2), Solid State Electronics
Simon Kristiansson
Chalmers, Microtechnology and Nanoscience (MC2), Solid State Electronics
Fredrik Ingvarson
Chalmers, Microtechnology and Nanoscience (MC2), Solid State Electronics
Kjell Jeppson
Chalmers, Microtechnology and Nanoscience (MC2), Solid State Electronics
Nordic Semiconductor Meeting, Tampere, Finland
Subject Categories
Electrical Engineering, Electronic Engineering, Information Engineering